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MODULE –I, AVR Microcontrollers & Assembly Language Programming, MODULE –I AVR Microcontrollers & Assembly Language Programming, 1.1 To understand AVR Microcontrollers and its Architecture, 1.1.1 To explain the basics of Microcontrollers, 1.1.2 To Compare and contrast Microcontrollers and Microprocessors, 1.1.3 To describe AVR family of Microcontrollers, 1.1.4 To list the AVR features, 1.1.5 To explain AVR Architecture with block diagram, 1.2 To comprehend AVR Assembly Language Programming, 1.2.1 To state the usage of instructions in Data Memory, 1.2.2 To write AVR data formats, 1.2.3 To explain the Program counter and Program ROM space, 1.2.4 To explain the RISC and Harvard architecture in AVR, 1.3 To apply Assembly Language Instructions in AVR, 1.3.1 To Explain Branch instructions and looping, 1.3.2 To Explain Call instructions and stack, 1.3.3 To explain Time Delay Loop, , What is a Microcontroller?, 1.1.1.Basics of Microcontrollers, A microcontroller is a VLSI (Very Large Scale Integration) Integrated Circuit (IC) that contains, electronic computing unit and logic unit (combinedly known as CPU), Memory (Program, Memory and Data Memory). I/O Ports (Input/Output Ports) and few other components integrated, on a single chip. Sometimes a Microcontroller is also called as a Computer-on-a- Chip or a, Single-Chip-Computer. Since the Microcontroller and its supporting circuitry are often, embedded in the device it controls, a Microcontroller is also called as an Embedded Controller.
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Sometimes, a Microcontroller is also called as a Computer-on-a-Chip or a Single-ChipComputer. Since the Microcontroller and its supporting circuitry are often embedded in the, device it controls, a Microcontroller is also called as an Embedded Controller.., The biggest user of Microcontrollers is probably the Automobiles Industry. Almost every car that, comes out of the assembly factory contains at least one Microcontroller for the purpose of engine, control. You can find many more Microcontrollers for controlling additional systems., Microcontrollers are a part of Digital Cameras, Video Camcorders, CD and DVD Players,, Washing Machines, Ovens, etc., Microcontrollers are also used in test and measurement equipment like Multimeters,, Oscilloscopes, Function Generators, etc. You can also find microcontrollers near your desktop, computer like Printers, Routers, Modems, Keyboards, etc.
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Key Features:, , , , , , , , , , , , , , , , , 32 x 8 general purpose registers., 32K bytes of in system self programmable flash program memory, 2K bytes of internal SRAM, 1024 bytes EEPROM, Available in 40 pin DIP,, 32 programmable I/O lines, 8 Channel, 10 bit ADC, Two 8-bit timers/counters with separate prescalers and compare modes, One 16-bit timer/counter with separate prescaler, compare mode and capture mode., 4 PWM channels, In system programming by on-chip boot program, Programmable watch dog timer with separate on-chip oscillator., Programmable serial USART, Master/slave SPI serial interface, , Special Microcontroller Features:, , , , , , Six sleep modes: Idle, ADC noise reduction, power-save, power-down, standby and extended, standby., Internal calibrated RC oscillator, External and internal interrupt sources, Power on reset and programmable brown-out detection.
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1.1.3.Describe AVR family of Microcontrollers, Brief history of AVR:The basic architecture of AVR was designed by two students of Norwegian Institute of, Technology, Alf-Egil Bogen and Vegard Wollan, and then was bought and developed by Atmel, in 1996., Atmel says that AVR is nothing more than a product name, but it might stand for Advanced, Virtual RISC, or Alf and Vegard RISC (the names of the AVR designers)., AVR family overview:AVR can be classified into four groups: Classic, Mega, Tiny and special purpose, Classic AVR:This is the original AVR chip, which has been replaced by newer AVR chips. Table 1.2 shows, some members of the Classic AVR that are not recommended for new designs., , Mega AVR:These are powerful microcontrollers with more than 120 instructions and lots of different, peripheral capabilities, which can be used in different designs (Table 1-3)., Some of their characteristics are as follows:, Program memory: 4K to 256 K bytes, Package: 28 to 100 pins
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Extensive peripheral set, Extended instruction set: They have rich instruction sets, , Tiny AVR :As its name indicates, the microcontrollers in this group have less instructions and smaller, packages in comparison to mega family. Systems with low costs and power consumptions can be, designed with the Tiny AVRs (Table 1-4). Some of their characteristics are as follows:, Program memory: 1K to 8K bytes, Package: 8 to 28 pins, Limited peripheral set, Limited instruction set: The instruction sets are limited., , Special purpose AVR:-
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The ICs of this group can be considered as a subset of other groups, but their special capabilities, are made for designing specific applications. Some of the special capabilities are: USB, controller, CAN controller, LCD controller, Zigbee, Ethernet Controller, FPGA, and advanced, PWM (Table 1-5)., , 1.1.4.AVR features:The AVR is an 8-bit RISC single chip microcontroller with Harvard architecture that comes with, some standard features such as on-chip program ROM, data RAM, data EEPROM, timers and, I/O ports., Most AVRs have some additional features like ADC, PWM and different kinds of serial, interface such as USART, SPI, I2C, CAN, USB and so on., 1.1.5. AVR architecture with block diagram:Simplified view of an AVR microcontroller is shown in fig 1.2. The AVR is an 8-bit RISC single, chip microcontroller with Harvard architecture that comes with some standard features such as, on-chip program ROM, data RAM, data EEPROM, timers and I/O ports., AVR microcontroller program ROM:- In microcontrollers, the ROM is used to store, programs. The program ROM size can vary from 1K to 256K.The AVR was one of the first, microcontrollers to use on-chip Flash memory for program storage. The Flash memory is ideal, for fast development because Flash memory can be erased easily., AVR microcontroller data RAM and EEPROM:-the RAM space is used for storing, data. The AVR has a maximum of 64K bytes of data RAM space. The data RAM space has three, components: general purpose registers, I/O memory and internal SRAM. There are 32 general –, purpose registers in all of the AVRs, but the SRAM’s size and the I/O memory’s size varies from, chip to chip. The internal SRAM space is used for a read/write scratch pad. In AVR , also have a, small amount of EEPROM to store critical data that does not need to be changed very often., AVR microcontroller I/O pins:- The AVR can have from 3 to 86 pins for I/O . The, number of I/O pins depends on the number of pins in the package itself. Thenumber of pins for, the AVR package goes from 8 to 100 at this time.
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AVR microcontroller peripherals:- Most of the AVRs come with ADC (analog to, digital converter), timers and USART (universal synchronous asynchronous receiver transmitter), as standard peripherals. ADC is 10-bit and the number of ADC channels in AVR chips varies, and can be up to 16, depending on the number of pins in the package. The AVR can have up to 6, timers besides the watchdog timer. The USART peripheral allows us to connect the AVR- based, system to serial ports such as the COM port of the x86 IBM PC. Most of the AVR family, members come with the I2C and SPI buses and some of them have USB or CAN bus, , 1.2.1.To state the usage of instructions in Data Memory, AVR DATA MEMORY, In AVR microcontrollers there are two kinds of memory space: code memory space and data, memory space. Our program is stored in code memory space, whereas the data memory stores, data. The data memory is composed of three parts: GPRs (general purpose registers), I/O, memory, and internal data SRAM (fig-2-3).
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GPRs (general purpose registers), CPUs use many registers to store data temporarily. The vast majority of registers are 8-bit, registers. In the AVR there is only one data type: 8-bit (D7-D0). With an 8-bit data type, any, data larger than 8 bits must be broken into 8-bit chunks before it is processed., In AVR there are 32 general purpose registers. They are R0-R31 (fig-2-1)and are located in the, lowest location of data memory (address location $0000-$001F).All of these registers are 8 bits., The general purpose registers in AVR are the same as the accumulator in other microprocessors., They can be used by all arithmetic and logic instructions.
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I/O Memory, The I/O memory is dedicated to specific functions such as status register, timers, serial, communication, I/O ports, ADC and so on. The function of each I/O memory location is fixed by, the CPU designer at the time of design because it is used for control of the microcontroller or, peripherals. The AVR I/O memory is made of 8-bit registers. The number of locations in the data, memory set aside for I/O memory depends on the pin numbers and peripheral functions, supported by that chip, although the number can vary from chip to chip even among members of, the same family. However, all the AVRs have at least 64 bytes of I/O memory locations. This, 64-byte section is called standard I/O memory., Internal data SRAM, Internal data SRAM is widely used for storing data and parameters by AVR programmers and C, compilers. Generally, this is called scratch pad. Each location of the SRAM can be accessed, directly by its address. Each location is 8-bits wide and can be used to store any data we want as, long as it is 8-bit. Again, the size of SRAM can vary from chip to chip, even among members of, the same family. See table 2-1 for a comparison of the data memories of various AVR chips.
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AVR DATA TYPE, The AVR microcontroller has only one data type. It is 8 bits, and the size, of each register is also 8 bits. It is the job of the programmer to break down data larger than 8, bits (00 to OxFF, or 0 to 255 in decimal) to be processed by the CPU. The data types used by the, AVR can be positive or negative. The bit-addressable data is discussed in later., , Data format representation, There are four ways to represent a byte of data in the AVR assembler. The numbers can be in, hex, binary', decimal, or ASCII formats. The following are examples of how each works., , , Hex numbers, , There are two ways to show hex numbers:, 1. Put 0x (or 0X) in front of the number like this: LDI RI 6, 0x99, 2. Put S in front of the number, like this: R22, $99., Here are a few lines Of code that use the hex format:, LDI R28, $75 ;;R28 0x75, SUBl R28,0X11 ;;R28 0x75 - 0x11=0x64, SUBI 0X20, ;;R28 0X64 - 0x20=0x44, ANDI R28, 0xf ;;R28 ox44-0x0F=Ox35, , , Binary numbers, , There is only one way to represent binary numbers in an AVR assembler., It is as follows:, LDI R16,0b10011001;; R16= 10011001 or 99 in hex, The uppercase B will also work. Here are some examples of how to use it:, LDI R23, 0b00100101 ;;;R23=$25, SUBI R25, 0B00010001;;R23=$25-$11=$14, , , Decimal numbers, , To indicate decimal numbers in an AVR assembler we simply use the decimal and nothing, before or after it. Here are some examples of how to, use it:, LDI R17, 12, ;;00010010 in binary and 0C in hex, SUBI R17, 2, ;;R17= 12-2=10 where 10 is equal to OxOA
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, , ASCII Characters, , To represent ASCII data in an AVR assembler we use single quotes as follows:, LDI R23,'2' ;;R23 - 00110010 or 32 in hex., LDI R20, '9' ;;R20 0x39, which hex number for ASCII '9', SUBI R20, '1';;R20 0x39 0X8, ;;(31 hex for ASCII '1'), Assembler directives, While instructions tell the CPU what to do, directives (also called pseudo insirucrions) give, directions to the assembler. For example, the LDI and ADD instructions are commands to the, CPU but .EQU, .DEVlCE and .ORG) are directives to the assembler. The following sections, present some more widely used directives of the AVR and how they are used. The directives, help us develop our program easier and make our program legible (more readable)., .EQU (equate), This is used to define a constant value or a fixed address. The .EQU directive does not set aside, storage for a data item but associates a constant number with a data or an address label so that, when the label appears in the program. its constant will be substituted for the label. The, following uses .EQU for the counter constant. and then the constant is used to load the R21, register:, .EOU COUNT = 0x25, ......................., LDI R21, COUNT :R21 = 0x25, When executing the above instruction “LDI R21 , COUNT“. the register R2l will be loaded with, the value 25H., Advantage of using .EQU. Assume that a constant (a fixed value) is used throughout the, program, and the programmer wants to change its value everywhere. By the use of .EQU. the, programmer can change it once and the assembler will change all of its occurrences throughout, the program. This allows the programmer to avoid searching the entire program trying to find, every occurrence., .SET, This directive is used to define a constant value or a fixed address. in this regard. the .SET and, .EQU directives are identical. The only difference is that the value assigned by the .SET directive, may be reassigned later.
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.ORG (origin), The .ORG directive is used to indicate the beginning of the address. It can be used for both code, and data., .INCLUDE directive, The .include directive tells the AVR assembler to add the contents of a file to our program (like, the #include directive in C language). In Table shown below, you see the files that you must, include whenever you want to use any of the AVRs., For example, when you want to use ATmega32, you must write the following instruction at the, beginning of your program:, . INCLUDE "M32DEF. INC", , ------------------------------------------------------------------------------------------------------------------------------, , LDI Instruction, LDI Rd, K; load Rd (destination) with immediate value K. Rd—R16-R31, K—any 8-bit number., LDI R20, 0x25; load R20 with 0x25 (R20=0x25), LDI R31, 0x87; load R31 with 0x87 (R31= 0x87), ADD Instruction, ADD Rd, Rr; ADD Rr to Rd and store the result in Rd.
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Program counter in the AVR, The program counter is used by the CPU to point to the address of the next instruction to be executed. As, the CPU fetches the op code from the program ROM, the program counter is incremented automatically, to point to the next instruction. The wider the program counter, the more memory locations a CPU can, access. That means that a 14-bit program counter can access a maximum of 16K (214 =16K) program, memory locations., In AVR each Flash memory location is 2 bytes wide. For example, in ATmega32, whose Flash is 32K,, the Flash is organized as 16Kx16 and its program counter is 14 bits wide (2 14 =16K memory locations)., Table 2.7 shows on-chip ROM size and address space of some of the AVRs., , ROM memory map of some of the AVRs are shown in fig 2-13., , RISC architecture in AVR, There are three ways available to microprocessor designers to increase the processing power of the CPU, 1. Increase the clock frequency of the chip., 2. Use Harvard architecture., 3. Use RISC architecture., Features of RISC [reduced instruction set computer], 1. RISC processors have a fixed instruction size. Hence the CPU can decode the instructions, quickly.[CISC (complex instruction set computer)microcontroller such as the 8051 instructions can be 1,2, or even 3 bytes].
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2. RISC architecture has a large number of registers. One advantage of a large number of registers is that, it avoids the need for a large stack to store parameters., 3. RISC processors have a small instruction set. RISC processors have only basic instructions such as, ADD, SUB, MUL, LOAD, STORE, AND, OR, EOR, CALL, JUMP and so on. The limited number of, instructions is one of the criticisms leveled at the RISC processor because it makes the job of Assembly, language programmers much more tedious and difficult compared to CISC assembly language, programming., 4. In RISC processor more than 95% instructions are executed with only one clock cycle, in contrast to, CISC instructions., 5. RISC processors use Harvard architecture., 6. Hardwiring of RISC instructions takes no more than 10% transistors (due to small set of instructions,, RISC instructions are implemented using the hardwire method).[CISC has a large number of instructions,, each with so many different addressing modes, microinstructions (microcode) are used to implement, them.], 7. RISC uses load/store architecture. In RISC, instructions can only load from external memory into, registers or store registers into external memory locations. There is no direct way of doing arithmetic and, logic operations between a register and the contents of external memory locations.[ In CISC, microprocessors, data can be manipulated while it is still in memory]., Branch Instructions in AVR Microcontroller, Looping in AVR :, A repeated operation or a set of instructions is known as a loop in programming. It is one of the most, fundamental techniques which comes in very handy in writing code. One way to execute a loop in AVR, is to write a set of instructions repeatedly., Conditional Branch Instructions :, The following table shows different conditional branch instructions along with their explanation., INSTRUCTIONEXPLANATION, , FLAG/STATUS, , BREQ, , Branch if equal, , Branch ifZ=1, , BRNE, , Branch if not equal, , Branch ifZ=0, , BRSH, , Branch if same or higher, , Branch if, C=0, , BRLO, , Branch if lower, , Branch if, C=1, , BRLT, , Branch if less than (signed), , Branch if S=1
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BRGE, , Branch if greater than or equal, (signed), , Branch if S=0, , BRVS, , Branch if Overflow flag set, , Branch ifV=1, , BRVC, , Branch if Overflow flag clear, , Branch ifV=0, , Loop using BRNE :, The BRNE (branch if not equal) instruction uses the Z flag in the status register., Example –, Write a program to add 5 to R20 20 times and send the sum to PORTC using the BRNE instruction., LDI R16, 20; counter register, LDI R20, 0, LDI R21, 5, LOOP: ADD R20, R21, DEC R16;, , decrement the counter, , BRNE LOOP;, , repeat until counter = 0, , OUT PORTC, R20, All conditional branches are short jumps: This means that the address of the target must be within 64, bytes of the program counter., Unconditional Branch Instructions :, The unconditional branch is a jump in which control is transferred unconditionally to the target address., In AVR, there are 3 unconditional branch instructions: JMP, RJMP, and IJMP. Using which instruction, depends upon the target address., 1. JMP (long jump) –, JMP is an unconditional jump that can go to any memory location in the 4M (word) address space of, the AVR. It is a 4-byte instruction in which 10 bits are used for the opcode, and the other 22 bits, represent the 22-bit address of the target location., 2. RJMP (relative jump) –, In this 2-byte instruction, the first 4 bits are used for the opcode and the rest of the bits are used for, the relative address of the target location. The relative address range of 000-$FFF is divided into, forward and backward jumps, that is within -2048 to +2047 of memory relative to the address of the, current program counter., 3. IJMP (indirect jump) –, It is a 2-byte instruction. When it executes, the program counter is loaded with the contents of the Z, register, so it jumps to the address provided by the Z register. IJMP can jump within the lowest 64K, words of the program memory., CALL Instructions and Stack in AVR Microcontroller, CALL is a control transfer instruction that is used to call a particular subroutine. A subroutine is a, block of instructions that need to be performed frequently.
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In AVR, there are 4 instructions for the call subroutine as following., 1. CALL (call subroutine), 2. RCALL (relative call subroutine), 3. ICALL (indirect call to Z), 4. EICALL (extended indirect call to Z), CALL :, In this 4-byte instruction, 10 bits are used for the opcode and the other 22 bits are used for the address, of the target subroutine just as in the JMP instruction. In this, 4M address space of 000000-$3FFFFF, for AVR and it can be used to call subroutines within the given range of address., To make sure that that the AVR knows where to come back after the execution of the subroutine, the, microcontroller automatically saves the address of the instruction just below the CALL instruction on, the stack. After finishing the execution of the subroutine, the RET instruction transfers control back to, the caller. Hence, every subroutine has a RET instruction at the end., Stack :, Stack is the part in the RAM of CPU to store information temporarily. The CPU needs this storage, because there only a limited number of registers. The register used to access the stack is called the stack, pointer (SP) register., In I/O memory space, there are 2 registers named SPL (the low byte of SP) and SPH (the high byte of, SP). The SP is implemented by these 2 registers., , In AVRs with more than 256 bytes of memory have two 8-bit registers. On the other hand, if the, memory is less than 256 bytes, SP is made up of only SPL, as an 8-bit register can only address 256, bytes of memory., The storing of the CPU information on the stack is called the PUSH operation, and the loading of the, stack contents back into the CPU is known as POP operation., Pushing onto the stack :, The stack pointer (SP) points to the top of the stack. As we push the data onto the stack, the data is, saved where the SP is pointing to and the SP is decremented by one., To push a register onto a stack, we use PUSH instruction., PUSH Rr;, Rr can be any general-purpose register (R0 - R31), Popping from the stack :, Popping the contents of the stack back into the register is the opposite function of pushing. When the, POP instruction is executed, the SP is incremented by one and the top location of the stack is copied, back to the register. This means that the stack is LIFO ( Last In First Out)., To retrieve back the data from the stack, we use POP instruction., POP Rr;, Rr can be any general-purpose register (R0 - R31)
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Initializing stack pointers :, When the AVR is powered up the SP register contains the value 0,which is the address of R0,, Therefore we must initialize the SP at the beginning of the program so that it points somewhere in the, internal SRAM.In AVR the stack grows from higher memory location to lower memory location so it is, common to SP to initialize the uppermost memeory location, Different AVRs have a different amounts of RAM. In the AVR assembler, RAMEND specifies the, address of the last RAM location. So, if we want to initialize the SP so that it points to the last memory, location, we can simply load RAMEND into the SP. Notice that SP is made up of 2 registers, SPH and, SPL. So, we load the high byte of RAMEND into SPH and the low byte of RAMEND into SPL., CALL instruction, RET instruction and the role of stack :, When the CALL instruction is executed, the address of the instruction below the CALL instruction is, pushed onto the stack. When the execution of that subroutine is finished and RET is executed, the, address of the instruction below the CALL instruction is loaded in the program counter and it is, executed., STATUS: Status Register, R/W0/0, , R/W0/0, , R/W0/0, , R/W0/0, , R/W0/0, , R/W0/0, , R/W0/0, , R/W0/0, , I, , T, , H, , S, , V, , N, , Z, , C, , bit 7, , , , bit 0, , bit 7, , I : Global Interrupt Enable: The Global Interrupt Enable bit must be set for the interrupts to be enabled., The individual interrupt enable control is then performed in separate control registers. If the Global, Interrupt Enable register is cleared, none of the interrupts are enabled independently of the individual, interrupt enable settings. The I-bit (bit 7) is cleared by hardware after an interrupt has occurred and is set, by the Return from Interrupt (RETI) instruction to enable subsequent interrupts. The I-bit can also be set, and cleared by the application with the Set Global Interrupt Flag (SEI) and Clear Global Interrupt Flag, (CLI) instructions, as described in the instruction set reference., , , bit 6, , T : Copy Storage: The Bit Copy instructions Bit Load (BLD) and Bit Store (BST) use the T-bit as a, source or destination for the operated bit. A bit from a register in the register file can be copied into T by, the BST instruction and a bit in T can be copied into a bit in a register in the register file by the BLD, instruction., , , bit 5, , H : Half Carry Flag: The Half Carry Flag, H, indicates a half carry in some arithmetic operations. It is, useful in Binary Code Decimal (BCD) arithmetic., , , bit 4, , S : Sign Flag, S = N xor V: The S-bit is always an exclusive or between the Negative Flag and the Two’s, Complement Overflow Flag., , , bit 3
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V : Two's Compliment Overflow Flag: The Two’s Complement Overflow Flag, V, supports two’s, complement arithmetic., , , bit 2, , N : Negative Flag: The Negative Flag, N, indicates a negative result in an arithmetic or logic operation., , , bit 1, , Z : Zero Flag: The Zero Flag, Z, indicates a zero result in an arithmetic or logic operation., , , bit 0, , C : Carry Flag: The Carry Flag, C, indicates a carry in an arithmetic or logic operation.