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External Memory andInput/output, , Programmed I/O
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I/O operation Techniques, ▪Three techniques are possible for I/O operations, ▪Programmed I/O, ▪Interrupt driven I/O, ▪Direct Memory Access(DMA)
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Programmed I/O, ▪The processor executes a program that gives it direct control of the I/O, operation, including sensing device status, sending a read or write, command, and transferring the data., ▪When the processor issues a command to the I/O module, it must wait until, the I/O operation is complete., ▪If the processor is faster than the I/O module, this is wasteful of processor, time.
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Interrupt-driven I/O, ▪The processor issues an I/O command, continues to execute other, instructions, and is interrupted by the I/O module when the latter has, completed its work
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Direct memory access(DMA), ▪With both programmed and interrupt I/O, the processor is responsible for, extracting data from main memory for output and storing data in main, memory for input., ▪ The alternative is known as direct memory access (DMA)., , ▪In this mode, the I/O module and main memory exchange data directly,, without processor involvement
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Overview of ProgrammedI/O, ▪When the processor is executing a program and encounters an instruction, relating to I/O, it executes that instruction by issuing a command to the, appropriate I/O module., ▪With programmed I/O, the I/O module will perform the requested action and, then set the appropriate bits in the I/O status register, ▪The I/O module takes no further action to alert the processor, it does not, interrupt the processor. T, ▪Thus, it is the responsibility of the processor periodically to check the status of, the I/O module until it finds that the operation is complete.
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I/O Commands, ❖To execute an I/O-related instruction, the processor issues an, address, specifying the particular I/O module and external device,, and an I/O command., ❖There are four types of I/O commands that an I/O module may, receive when it is addressed by a processor, ❖ Control, ❖ Test, ❖ Read, ❖ Write
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I/O Commands, ▪Control: Used to activate a peripheral and tell it what to do., ▪For example, a magnetic-tape unit may be instructed to rewind or, to move forward one record., ▪Test: Used to test various status conditions associated with an I/O, module and its peripherals., ▪The processor will want to know that the peripheral of interest is, powered on and available for use., , ▪It will also want to know if the most recent I/O operation is, completed and if any errors occurred
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▪Read:, , Causes the I/O module to obtain an item of data from the, peripheral and place it in an internal buffer, , ▪The processor can then obtain the data item by requesting that the, I/O module place it on the data bus., ▪Write: Causes the I/O module to take an item of data (byte or word), from the data bus and subsequently transmit that data item to the, peripheral.
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▪Data are read in one word (e.g., 16 bits) at a, time., ▪For each word that is read in, the processor, must remain in a status-checking cycle until it, determines that the word is available in the I/O, module’s data register., ▪Disadvantage : it is a time-consuming process, that keeps the processor busy needlessly.
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I/O Instructions, ▪There will be many I/O devices connected through I/O modules to the system., ▪ Each device is given a unique identifier or address., ▪When the processor issues an I/O command, the command contains the, address of the desired device., ▪Thus, each I/O module must interpret the address lines to determine if the, command is for itself., ▪When the processor, main memory, and I/O share a common bus, two modes, , of addressing are possible: memory mapped and isolated
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Memory mapped IO, , ▪Memory mapped IO uses the same address space for both memory and IO, , ▪The processor treats the status and data registers of I/O modules as memory, locations and uses the same machine instructions to access both memory, and I/O devices., ▪The assigned addresses for interface registers cannot be used for memory, words, which reduces the memory address range available, ▪There are no specific input or output instructions., ▪The CPU can manipulate l/0 data residing in interface registers with the same, instructions that are used to manipulate memory words., ▪load and store instructions used for reading and writing from memory can be, used to input and output data from l/0 registers.
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Isolated IO, ▪Isolated IO uses one common bus to transfer information between memory, or IO and the CPU., , ▪The distinction between a memory transfer and IO transfer is made through, separate read and write lines., ▪The IO read and IO write control lines are enabled during an IO transfer., ▪The memory read and memory write control lines are enabled during a, memory transfer., ▪The isolated IO method isolates memory and IO addresses so that memory, address values are not affected by interface address assignment since each, has its own address space
