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1. Convert the given Gray code number to equivalent Binary 001001011110010., Also convert (AOF9.0EBA98.0DC) 16 to decimal, binary, octal., 2. Express the Boolean function, @F=A+B°C as standard sum of Min terms., (11) F=XY+X'Z as a product of Maxterms., 3. Explain with truth table and logic diagram BCD-Adder and Serial Adder:, 4. Explain seven segment LED's Display and Barrel shifter with neat diagram., 5. What is race around condition? How does it get eliminated in a Master -Slave?, J-K flip- flops?, 6. Design a sequence detector circuit to detect a serial input sequence of 1010., It should produce an output 1 when the input pattern has been detected., 7. Explain the operation of TTL NAND gate for totem pole and active pull-up output., I, 8. Implement the following Boolean function using PAL, () A (x. y, z) = Em (1, 3, 5, 6)., (i1) B (x, y, z) =Em (0, 1, 3, 6, 7)., 9. Describe HDL Simulation and Synthesis., 10. Explain the following tems., (a) constants (b) Data Types (c) Primitive's (d) module concept.
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MARKS:30, IME:1.1/2 Hrs, Answer any THREE questions:, 1.Explain the following terms a). ()Self complementing i) prime implicants (i)(110.10),-()a, (iv) 2's complimenting v) (D69.A4)16)2, (b).Explain about Serial Adder with neat circuit diagram., 2. Reduce the following using K-map and design logic diagram(a). F.(A, B, C, D) =Em(0,2,3,6,7)+Sd(8,10,11,15)., (b) .F(A,B,C,D)=Em (0,1,2,3,5,7,8,9,10,11,12,13), 3. (a). Explain 7-Segment LED display with neat diagram.(b). Explain with a truth table of Half-adder and Full-adder., 4. (a).Explain about 8X1 Multiplexer using 4X1 Multiplexer., 5. Explain about BCD adder., 6. Explain in detail Barrel shifter and ALU., UNIVERSITY COLLEGE OF ENGINEERING (KU), B.TECH II/IV (ECE) 1-SEMESTER I-MID EXAMINATION 2020-21, DIGITAL SYSTEM DESIGN, MARKS:30, TIME:1.1/2 Hrs, Answer any THREE questions:, 1.Explain the following terms a). (OSelf complementing i) prime implicants (ii)(110.10),), (iv) 2's complimenting v) (D69.A4)16--()2, (b).Explain about Serial Adder with neat circuit diagram., 2. Reduce the following using K-map and design logic diagram(a). F.(A, B, C, D) ={m(0,2,3,6,7)+5d(8,10,11,15)., (b).F-(A,B,C,D)=m (0,1,2,3,5,7,8,9,10,11,12,13), 3. (a). Explain 7-Segment LED display with neat diagram.(b). Explain with a truth table of Half-adder and Full-adder., 4. (a).Explain about 8X1 Multiplexer using 4X1 Multiplexer., 5. Explain about BCD adder., 6. Explain in detail Barrel shifter and ALU.
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Styles, 1. Convert the following:, O D69 A4)16 = ()2, (11) 110.10)2 = () 8, %3D, (111) (57) 10=Os, (iv) (43)s=()5, 2. Simplify the following function using K-Map and Tabular method, Realizes using NAND gates. F (A, B̟ C, D) =Em (1,2,3,5,6,7,8,9,12,13,15)., 3. Explain seven segment LED's Display and Parallel-adder with neat diagram., 4. With a neat sketch and truth tables explain ALU and 3 to 8 Decoder., 5. With a neat sketch and truth tables explain the operation of Ring and Johnson counter., 6. What is Module's counter? Design a natural binary sequence mod-8 synchronous, counter using D Flip-Flop., 7. Design a transistor circuit of 2 inputs ECL OR and NOR gate. Explain the operation, With the help of function table. List advantages of ECL logic family., 8. Describe in detail about FPGA and CPLDS., 9. Explain about Module modelling styles with an example., 10. Explain the following tems., (a) constants, (b) Data Types, (c) Primitive's, (d) Lexical Conversions, (e) Module concept.